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Digital Electronics: Types of Flip-Flop Circuits?

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2016-03-26 18:37:07
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In electronics, a flip-flop is a special type of gated latch circuit. There are several different types of flip-flops. The most common types of flip flops are:

  • SR flip-flop: Is similar to an SR latch. Besides the CLOCK input, an SR flip-flop has two inputs, labeled SET and RESET. If the SET input is HIGH when the clock is triggered, the Q output goes HIGH. If the RESET input is HIGH when the clock is triggered, the Q output goes LOW.

    Note that in an SR flip-flop, the SET and RESET inputs shouldn't both be HIGH when the clock is triggered. This is considered an invalid input condition, and the resulting output isn't predictable if this condition occurs.

  • D flip-flop: Has just one input in addition to the CLOCK input. This input is called the DATA input. When the clock is triggered, the Q output is matched to the DATA input. Thus, if the DATA input is HIGH, the Q output goes HIGH, and if the DATA input is LOW, the Q output goes LOW.

    Most D-type flip-flops also include S and R inputs that let you set or reset the flip-flop. Note that the S and R inputs in a D flip-flop ignore the CLOCK input. Thus, if you apply a HIGH to either S or R, the flip-flop will be set or reset immediately, without waiting for a clock pulse.

  • JK flip-flop: A common variation of the SR flip-flop. A JK flip-flop has two inputs, labeled J and K. The J input corresponds to the SET input in an SR flip-flop, and the K input corresponds to the RESET input.

    The difference between a JK flip-flop and an SR flip-flop is that in a JK flip-flop, both inputs can be HIGH. When both the J and K inputs are HIGH, the Q output is toggled, which means that the output alternates between HIGH and LOW.

    For example, if the Q output is HIGH when the clock is triggered and J and K are both HIGH, the Q output is set to LOW. If the clock is triggered again while J and K both remain HIGH, the Q output is set to HIGH again, and so forth, with the Q output alternating from HIGH to LOW at every clock tick.

  • T flip-flop: This is simply a JK flip-flop whose output alternates between HIGH and LOW with each clock pulse. Toggles are widely used in logic circuits because they can be combined to form counting circuits that count the number of clock pulses received.

    You can create a T flip-flop from a D flip-flop by connecting the Q-bar output directly to the D input. Thus, whenever a clock pulse is received, the current state of the Q output is inverted (that’s what the Q-bar output is) and fed back into the D input. This causes the output to alternate between HIGH and LOW.

    You can also create a T flip-flop from a JK flip-flop simply by hard-wiring both the J and K inputs to HIGH. When both J and K are HIGH, the JK flip-flop acts as a toggle.

Although you can construct your own flip-flop circuits using NAND gates, it’s much easier to use integrated circuits (ICs) that contain flip-flops. One common example is the 4013 Dual D Flip-Flop. This chip contains two D-type flip-flops in a 14-pin DIP package.

Pin Name Explanation Pin Name Explanation
1 Q1 Flip-flop 1 Q output 8 SET2 Flip-flop 2 SET input
2 Q1-bar Flip-flop 1 Q-bar output 9 DATA2 Flip-flop 2 DATA input
3 CLOCK1 Flip-flop 1 CLOCK input 10 RESET2 Flip-flop 2 RESET input
4 RESET1 Flip-flop 1 RESET input 11 CLOCK2 Flip-flop 2 CLOCK input
5 DATA1 Flip-flop 1 DATA input 12 Q2-bar Flip-flop 2 Q-bar output
6 SET Flip-flop 1 SET input 13 Q2 Flip-flop 2 Q output
7 GND Ground 14 VDD +3 to 15 V

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Doug Lowe is the information technology director at Blair, Church & Flynn Consulting Engineers, a civil engineering firm. He has written more than 50 For Dummies books on topics ranging from Java to electronics to PowerPoint.